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Hey,
For me it was the version of vituoso that prevented me from getting the vamsnetlist. so I had to use another tool to get it, but that is internal and not the right way of doing it.
In short I would say check the virtuoso version if it allows you to do this.
I am trying to create a wrapper for my rxbb_lp module(which is VAMS netlist of my analog circuit) , the input of the wrapper is different from the input of the rxbb_lp module and I want to generate a signal(sine wave in my wrapper).
Is this the correct way to do it?
This is one of the ways I...
I am trying to create a VERILOGAMS netlist of my schematic and I encounter the following errors:
ERROR (OSSHNL-254): Terminal 'VSS1V8A' of place master 'work_praseetha/rxbb_lp/symbol' has no corresponding terminal in
instance 'rxbb_lp_inst' of cellview...
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