Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
PrimeTime Query
First, you should ensure it's a true violated path. So you should dive into RTL and documents, maybe talk with front-end designer.
In report_timing, you are able to use -justify to verify ture or false path. Please refer to documents for detail.
As a professional, you are not...
soc encounter
Refer to encounter user guide, there is a chapter of synthesizing clock trees. And I do recommend you write a Clock Tree Specification File to fully control it. GUI is not so recommended.
synopsys installation
From INSTALL_README.txt
Setting Up the User Environment
========================================================
To set up your users, you must create a Synopsys source file, or modify
each user's $HOME setup files (typically .cshrc, .profile, .kshrc, or .bashrc)...
Don't know you are interested in P&R algorithm or tool.
For algorithm, Modern VLSI Design: System-on-Chip Design (3rd Edition) by Wayne Wolf has a very good chapter on this topic. Essential Electronic Design Automation (EDA) is another useful book for entry level. Then you might search IEEE...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
