Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I'm trying to use xc3sprog with FT2232H. My chips are XC3S200 FPGA and XCF01S PROM. They are recognized and I can program them, but only when I have LPT<->JTAG programmer cable also connected. When this programmer is unplugged, chips are recognized but I can't program. I can only erase...
Now I see. I thought that it will be some delay, but it takes two clock cycles in first state and one cycle in next states.
Thank you very much for your help.
Ok, now I understand but don't know why it happens, why only on the second value.
No, I didn't simulated it and yes, I know it is wrong way, against good design practice. I though that it will be simple.
I don't understand.
Xilinx docs says that data is available when I set request for it. So I thought that it happens simultaneously:
address (31 downto 24) <= rx_fifo_q;
rx_fifo_rdreq <= '1';
It is Xilinx FIFO.
I'm not quite sure. I use FTDI and writing code to FIFO from opencores.org (FT2232H USB Avalon Core):
rx_fifo_rdclk <= clk;
tx_fifo_wrclk <= clk;
-- U S B side
rx_fifo_wrclk <= usb_clock;
tx_fifo_rdclk <= usb_clock;
ft2232_tx_please <= '1' when usb_txe_n = '0' and...
Hi,
in FIFO First-Word Fall-Through, when I check if it is not empty (empty = 0) and then in this case set '1' on read_enable together with assigning data output to some signal ( at the same time), I should get correct value? And if I check in the next step that FIFO is still not empty and do...
Hello,
I have a problem with controll my device through FT2232H. I use Visual C# and FTD2XX_NET.dll to set it in Synchronous FIFO mode. My app works. I can send data to my board (there is FPGA, not uC, but I see here is the biggest amount of people using FTDI chips).
My problem is to separate...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.