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Recent content by PDB

  1. P

    hysteresis by a inverter if Vtn + Vtp > VDD(supply voltage)...

    Hi, I am trying to understand why there will be hysteresis in an inverter if (Vtn + Vtp) is greater than VDD(supply).. For eg., Assume Vtn=0.6V, Vtp = 0.6V and VDD = 1V. Please help me in understanding this... Thanks in advance...
  2. P

    Miller cap working....

    Hi, I am trying to use a miller cap in my design to implement some delay.... Can anyone suggest some paper or book where working of the Miller cap is nicely described? Thanks in advance :) PDB
  3. P

    Ioh & Iol currents

    Hi, Can any one tell me the significance of Ioh and Iol current in an IO pad? Is it a way of specifying the o/p resistance of the driver? Thank you in advance....:-)
  4. P

    What is the meaning of netcheck ( or ESDNETI check) in layout verification?

    Hi, What is the meaning of netcheck ( or ESDNETI check) in layout verification ? And what is its significance (I mean how important is it)?
  5. P

    Application of open-drain driver

    Hi, Can anyone tell me the application of open drain driver ?
  6. P

    Well Proximity effect

    Hi, Have some more questions on WPE. What is the effect on transistor performance if the well gradient is formed along the width not channel, as shown in below image?. https://obrazki.elektroda.pl/6_1286430864.jpg And can you please explain example 3 in p.9 in the following pdf, which is...
  7. P

    Well Proximity effect

    Hey thanks a lot... PDB
  8. P

    Well Proximity effect

    Thanks a lot... ---------- Post added at 09:04 PM ---------- Previous post was at 08:56 PM ---------- Hey I have some questions on STI. When is deep trench isolation used? and when shallow trench isolation? Is STI also used for isolation of same devices?
  9. P

    Well Proximity effect

    Hi, Thank you for replying. But, why should S-oriented device have higher vt?, as both need same voltage(Vgs) to form inversion layer. Again as mentioned in the ref. paper, for large values of Vgs, Ids of S-oriented devices becomes greater than that of D-oriented devices. what is the...
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    Well Proximity effect

    Hi, Can any one tell me why, due to well proximity efffect, Vt of S-oriented device is more than that of D-oriented device? I reffered following paper. "Implications of Proximity Effects for Analog Design" by P. G. Drennan, M. L. Kniffin, D. R. Locascio.
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