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Recent content by paulmdrdo

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    Biasing of diff pair.

    Good day to all. I'm doing a self study about the circuit shown above. I kind of don't understand which structure biases the differential pair(red). The explanation I read from the book that it is the structure in green that biases it, but the lecture I'm following says it it's the structure in...
  2. P

    Diode connected fets.

    I read that the structure in green are diode connected. I am only familiar with the single device version of diode connected MOSFET. Can you tell me what's the advantage doing it using two devices as shown? Thank you. I'm self learning please bear with me.
  3. P

    Biasing of diff pair.

    What's the benefit of biasing the input diff amp shown in red? Also I want to understand the benefit of placing the device in green area. I know it's a floating current source but what benefit do we get from it? Thank you!
  4. P

    Finding KP of a transistor model

    So I want to design and simulate an CMOS op amp in LTspice using a spice model shown below. I'm really having a hard time sizing the transistors because I have no idea what KP should I use. * BSIM3 models for AMI Semiconductor's C5 process * * Don't forget the .options scale=300nm if using...
  5. P

    Forward converter magnetizing current.

    The graph for the magnetizing current Im seems to cross zero at exactly half of the first interval can you explain why is that happening? Same phenomena happens during the second interval it crosses zero at exactly half of that interval
  6. P

    Forward converter magnetizing current.

    Thank you for the informative response. What about the second part of my question? The statement seems to me that the capacitor changes voltage instantaneously.
  7. P

    Forward converter magnetizing current.

    Can somebody explain why the magnetizing current starts at a negative value? The highlighted part below kind of gives me a hard time to comprehend. Does this mean that the voltage across the capacitor is changing from one value to another instantly when S2 closes? I was taught that capacitor...
  8. P

    DC-DC converter analysis

    I am having a hard time doing a derivation for the DC component of the voltage across cap C2. It has to be in terms of source voltage Vg and duty cycle D. Please help me get started. I know the role of the cap is to reset the transformer so it would not saturate. So for the first interval the...
  9. P

    Automatic gain controller action

    i posted it above
  10. P

    Automatic gain controller action

    Can you guys explain to me how the turning on of Q2 and the charging of C2 increases the vgs of the FET? An equation would be helpful.
  11. P

    Single ended voltage controlled current source

    Hi! is the transistor Q1 saturated? It seems to me that it is on the verge of saturation. Am I correct? Also, does the first opamp function as voltage follower?
  12. P

    Differential amplifier opamps common-mode gain

    Hello! May I know what site did you get this design notes? thank you!
  13. P

    Single ended voltage controlled current source

    Hi Guys! Can you tell how VL(max) was derived? I know how to derive the voltage at point B and A. Va = Vb = Vcc-Vin. I want to know how the equation for VL(max) was derived,
  14. P

    Differential amplifier opamps common-mode gain

    I'm having a hard time deriving for equations 10-8 -10-9. i tried adding equations 10-6 and 10-7 but still can't proceed to proper derivation. Any help is appreciated.

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