Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by oscillator_cn1

  1. O

    Question from a rookie:about Milkyway library

    Hi,all I know little about Milkyway library.When I useing the library of .13,I'm not sure where the Milkyway library is.In synthesize,my library is ss_1v08_125c, and directory ..../aci/sc-x/apollo/ has 3 lib file:smic13g/smic13hvt/smic13lvt.which one should I use as a Milkyway library...
  2. O

    Question from a rookie:How to generate a SPEF file.

    Hi,all I'm doing STA of an IP, but it need SPEF file . Does anybody tell me how to generate a SPEF file ? Thanks.
  3. O

    [SOLVED] Question from a rookie:Why DC report violation of RN port ?

    Hi,lostinxlation It's you again. Thank you. Now I knew what is the library recovery time now. But the delay is always positive, and the recovery time is always negative. In this case library recovery time is -47.45,with a clock period is just only 8,therefor the data required time is always...
  4. O

    [SOLVED] Question from a rookie:Why DC report violation of RN port ?

    Hi,All: I'm doing synthesize using DC, it report me a violation , who has a summary below: point fanout cap trans incr path clock clk_osc 0.00 0.00 ...
  5. O

    How to deal with level trigger register in scan insert?

    Hi, lostinxlation I edit code above again,And I knew where the problem is . it should be : READ_D_WRITE: if(hready) begin if (frame_end_flag == 1'b0) next_state = WRITE_D_READ; else next_state = LAST_WDATA...
  6. O

    How to deal with level trigger register in scan insert?

    Hi, lostinxlation Ok.Here it is: parameter IDLE = 3'b000; parameter READ_REQ = 3'b001; parameter READ = 3'b010; parameter READ_D_WRITE = 3'b011; parameter WRITE_D_READ = 3'b100; parameter LAST_WDATA = 3'b101; reg [2:0] next_state; always @ (state or rd_en or frame_end_flag or hgrant...
  7. O

    How to deal with level trigger register in scan insert?

    Hi,lostinxlation Thank you very much. Yes, it is level trigger latch (sorry). She defined "nest_state" as a reg, and it is not trigged by clock edge,clock signal is not in the Sensitive List too. DC synthesize it into "TLATX1M". Thanks again.
  8. O

    How to deal with level trigger register in scan insert?

    Hi,all A state machine used a level trigger register, When inset scan-chain, I dont know how to deal with this register. Should I use "set_scan_element false" for it ;or should be contained in scan-chain? If it is part of scan-chain , how can I do with its scan clock. Thanks in advance.

Part and Inventory Search

Back
Top