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Dear Cata , thanks for feedback . Indeed I did not write whole of this code , the main core of this code is related to a weblog called vhdldesign hosted on blogspot and I guess it is for indian engineers. However I have modified and added some parts such as clock division and seven segment...
Dear Sir , thanks for giving me your time to write reply .. in fact I have synthesized this code on ISE 14.7 and it could be successfully synthesized without any error except two warnings related to putting the BTN0 , BTN1 into the sensitivity list of the process function , moreover I have set...
for doing functional test I need to write test bench which I dont know how to do , that's why I requested some one do the hardware test for me.
Why this code cannot be implemented on CPLD? can you explain more? I didn't get what you mean by pointing out my code.
Those buttons are asynchronous...
Dear All
Good day to you , I have recently prepared one VHDL code for implementing a digital clock and because I don't have any CPLD IC and its programmer , I wonder if any one can test the below code for me and then feedback to me whether the code is correctly working or not
List of Material...
Hi dear FVM , sorry for replying late ...
the purpose of inverted Mosfet: in fact a this is only a schematic symbol misunderstanding and as i asked from the professor, the Q1 is a normal nmos transistor.
the purpose of that R2 is to causing current drainage so that the the Q2 transistor will...
thank you all for your answers and guidelines , as I studied Behzad Razavi CMOS design book , I have written one voltage division on R2 from Vref and then written one KVL in the loop between R2 and Vgs of the Q2 and finally calculated the current flowing through the Q2 , I don't know if it is...
Dear All
Recently I faced a problem in calculating the output current in a circuit which is similar to current mirror circuit. I wanted to ask for your ideas on how to solve this circuit problem . In this circuit we supposed Vdd as Vreference.
the schematic is as below :
thanks in advance...
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