Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by okokokok1111

  1. O

    question: why does the ic compiler need setup logical lib.

    logical lib the synopsys recommended process needs to setup logical libraries for icc, just like dcc, who can tell me why!! thanks in advance.
  2. O

    huge current problem by hsim

    lib should has no problem, I also did simulation by netlist file, the result is pretty reasonable
  3. O

    huge current problem by hsim

    Hi, guys I met a weired problem on post layout simulation by hsim. The logic function of simulation result is totally right, but the current is surprisely huge(hundreds times bigger than expected). The simulation use dspf file from Astro, and BSIM4 model for 65nm technology. Has anyone met such...

Part and Inventory Search

Back
Top