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Thnaks for your reply. I used Output pad only for TDO port. But still I am getting the error message . Please help me . Snd me any docs or files if you have.
Hi,
I am doing Project on Jtag Boundary scan using Synopsys tools. I have to Insert Boundary scan to my Design . While in the process I have to Insert I/O pads.
All pads Were Inserted Correctly but TDO Port is not Inserted . It is giving error message . "TDO port pad should have an Enable...
I saw script_verilog .rar file. In that I saw script_verilog.tcl file.
I saw that script, in the script I saw read_pin_map pin.txt but I don't know where that file(pin.txt) exists. That file is not there in .rar file. So please send me the file "pin.txt"
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