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Recent content by nuiscet

  1. N

    Phase margin of opamp in bandgap reference

    Phase magin is necessary. Gain is important to ensure that the voltages of the positive and negitive input terminals are equal, too. and other PSRR is also important for the bandgap voltage undepending on the supply voltage, i think.
  2. N

    How to ensure negative feedback factor more than positive?

    So we can get a conclusion of 'gm2=gm1' if the two branches current are equal just as jordan76 said , and gm*(R1+1/gm2) > gm*1/gm1 must be right with the matched size of mirror PMOS. An overall negative feedback can be ensured.
  3. N

    How to ensure negative feedback factor more than positive?

    What's the exact parameter for the bipolar transistor? gm=Ic/Vt ? Isn't undepending on the Is? here Is is the saturation current, and Is2=nIs1 since the area ratio of them is n:1.
  4. N

    How to ensure negative feedback factor more than positive?

    The negative feedback factor is Betan=gm*(R1+1/gm2),here gm is the transconductance of the PMOS and gm2 is the transconductance of the transistor with area of nA. The positive feedback factor is Betap=gm*1/gm1 , here gm1 is the transconductance of the transistor with area of A. Are the factors...
  5. N

    How to ensure negative feedback factor more than positive?

    Re: How to ensure negative feedback factor more than positiv how about the factors in this figure?
  6. N

    How to ensure negative feedback factor more than positive?

    In the circuit of bandgap , the feedback signal produced by the op amp returns to both of its inputs. so how to ensure that the negative feedback factor is more than the positive feedback factor ? Isn't necessary to ensure an overall negative feedback? or the bandgap circuit must be negative...
  7. N

    how to learn verilogA ?

    MATLAB or Verilog A? which one is better for modeling the analog system and simulation it.
  8. N

    Converge problem in latch circuits

    sometimes we can try to use a pwl input wave to solve the converge problem , maybe. for example, v0 vdd 0 pwl 0 0 1u 3.0
  9. N

    Why do we calculate pole/zero location by hand ?

    pole/zero analysis? usually we can find the node with the largest capacitor and impedence to decide which node is the position causing the dominate pole and the second non dominant pole. At the output teminal , there should be the dominate pole or the second non dominant pole. and the node with...
  10. N

    How to build a wideband amplifier?

    wideband amplifier The low frequence gain can't be designed to be very high.
  11. N

    temperature impact on CMOS folded cascode op amp

    cmos op amp, temperature The process is not good.
  12. N

    Hspice oscillation issues in LDO design

    hspice error (?) the set of accurate=1 may cause the oscillation sometimes.
  13. N

    CMOS circuit design using Hspice

    Hspice simulations Hspice manual is the best material and is enough,i think.
  14. N

    help in op amp design

    R=1/gm51 to cancell the Influence of the zero point and C depends on the load capacitor and the ratio of the first stage amplifier gain and the second stage amplifer.usually we take the factor of 2~3 .

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