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Recent content by nsgil85

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    FPGA neural network training

    Hi I think you should start with building the network from known framework such as Keras /Tensorflow etc.. check if you get what you wish for. Then do the math & calculation for inferncing on FPGA. Read this artical for beter assessment...
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    [SOLVED] infer RAM with mlab or m10k

    Hi What is the syntex to implement RAM so quartus can infer MLAB or M10K blocks Gil
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    [SOLVED] record issue with quartus 15.1

    Yep!, still not accepted. Does Vivado can handle such an error?
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    [SOLVED] record issue with quartus 15.1

    Tried, it pass compilation. neither version 18.0 support such an error any idea how to overcome this?
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    [SOLVED] record issue with quartus 15.1

    Error (10410): VHDL Type Conversion error at u1.vhd(71): Type Conversion near text or symbol "DvpBus" must have one argument
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    [SOLVED] record issue with quartus 15.1

    Hi I have this piece of code: entity U1 is generic ( POS_CONFIG_1 : positive := 8; POS_CONFIG_2 : positive := 75; POS_CONFIG_3 : positive := 10; POS_CONFIG_4 : positive := 48; POS_CONFIG_5 : positive := 4 ) ; port...
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    [SOLVED] std_logic conversion

    The compiler is set to vhdl 2008 It worked after i changed it to constant, Still what about the output? (let's say i want to maintain std_logic)
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    [SOLVED] std_logic conversion

    This is what i thought but i get this error:
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    [SOLVED] std_logic conversion

    Hi suppose i have this procedure: procedure registery(signal clock : in std_logic; signal rst : in std_logic; signal input : in std_logic_vector; signal output : out std_logic_vector)is begin if rst = '0' then for i in output'range loop...
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    [SOLVED] Force fitting block without drive output

    Hi Is there a way to force fitting even thoug there is not output drive? (it's for corner cases where it is necessary to determine the usage of resource) thanks Gil
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    [SOLVED] ModelSim tcl directory path

    Hi I'v batch file that run modelsim: set a="%~dp0" set a=%a:\=/% vsim -gui -do "cd %a%" -do compile.tcl Pause&Exit The directory path in modelsim is where the batch file is located ("C:\HDL\Blocks\simulate\open_modelsim.bat") compile.tcl file is: vlib lib vmap work lib vcom -novopt -O0...
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    Overflow pointer cell

    Hi, My count is from 0 to 199 = 200 cells cell_back is from 0-19 (0 = go back by one)
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    Overflow pointer cell

    Hey all, Need a little help, There is one process that writes to 200 cells in cycles, when there is EN, the writing process stops, and begins the reading process from the current cell that reached the counter of writing less X addresses (input vector). For example: total_cells = 200 write_cnt =...
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    [SOLVED] Compare vectors with threshold

    Hi i'v changed it so it can do the warp around: enable_riz <= '1' when resize(signed(COMPA),COMPA'length +2) <= (resize(signed(COMPB),COMPB'length +2) +(signed('0' & th))) and resize(signed(COMPA),COMPA'length +2) >= (resize(signed(COMPB),COMPB'length +2) -(signed('0' &...
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    [SOLVED] Compare vectors with threshold

    Do you mean somthing like this: enable <= '1' when unsigned(abs(signed(DATA)-signed(DATA2)) < ("0000"&unsigned(THRESHOLD)) else '0' ;
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