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Recent content by NSergeevich

  1. N

    verilog, the wait statement

    I'm using Xilinx WebPack with spartan6 XC6SLX100. I took tri mode eth mac v4.5 module. I want to write state-machines on Verilog wich would describe the picture above. I mean, that I want to send ethernet frame, but the first byte have to sending continuously and then when emacclienttxack will...
  2. N

    verilog, the wait statement

    what kind of hardware I should to use ?
  3. N

    verilog, the wait statement

    How to describe in Verilog delay first byte before the arrival emacclienttxack? Thanks very much!
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