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Recent content by nschutten

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    signal strength of wireless transmission ~ 1/ r^3

    In addition to the above: in the far field, signal strength is indeed proportional to 1/r^2, but note that this is under open space conditions. In e.g. indoor environments, signal strength may drop off at a higher order (e.g. 1/r^2.5 or 1/r^3).
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    Antenna Port for Microstrip simulation on CST

    You should regard a "port" as the point where you would connect an RF cable to the antenna structure. I would recommend to use lumped ports in simulation.
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    microstrip patch antenna impedance

    50Ohm is the standard impedance for RF; hypothetically, you could use a different system impedance, e.g. if your RF PA has an output impedance if 30Ohms; but since measurement equipment, cables, etc. are all 50Ohms, it is probably advisable to target 50Ohms for your design as well. You can...
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    microstrip patch antenna design

    For impedance matching, it would be better to move the coaxial feed point inside the microstrip patch antenna.
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    CST antenna simulation

    I haven't worked with CST, but with HFSS and GEMS I got the most representative results when using lumped ports instead of wave ports for microstrip structures. If you want to simulate antennas, for sure don't use PEC as this will only reflect all radiation from the antenna. You should use an...
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    SystemC beginner's question

    Someone from the SysmtemC Help Forum (Gino) helped me out on this: the compiler settings were different between when compiling the SystemC library and when compiling the example file. Thanks!
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    SystemC beginner's question

    Thanks for the quick reply! Anyone have any thoughts on the mentioned error messages in Windows (VC++ Express 10)?
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    SystemC beginner's question

    I am very interested in starting some SystemC (I am actually from a HW background, but want to gain some further system understanding). I downloaded the SystemC lib from Home - Open SystemC Initiative (OSCI) and compiled it under VC++ Express 10. When I now try to run the following simple...
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    Appropriate Voltage Regulator/How circuit works?

    About your opamp and resistor bias circuit: the resistors will indeed consume only little current; however, the opamp will need to regulate its output to continue to output 3.5V, regardless of its output loading. The only way it can do that, is draw from the 12V supply; so the opamp will behave...
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    Appropriate Voltage Regulator/How circuit works?

    Hi Gwow, I think you should be able to use an opamp with the resistive voltage divider you describe, as long as current ratings are all OK. Please note though, that the efficiency of this voltage regulation will be very low (you will always loose 12V-3.3V across the regulation; so at 15mA you...
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    What program supports 2D sheet metal and fold lines -> 3D

    Re: What program supports 2D sheet metal and fold lines -&gt Hi Payala, thanks for your reply! I had tried Alibre (didn't try Solidworks due to the price) and some other tools, but in the end ended up with TurboCAD Pro. This is relatively inexpensive (675 euro excl. tax), is relatively easy to...
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    guard ring connections N+ and P+

    I have found that the guard ring connections need to be low impedance, in which case RC filtering is out of the question (this only increases the impedance). Also, I have seen an UMC appnote where P+ N+ guard rings are used, but both are connected to GND. Anyone has any experience with this?
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    If you need help with ESD... ask me in this post

    Thanks, prcken, for helping me by giving some further info regarding my ESD question. BTW: the transistor in question is not a power down transistor, it is a switching transistor for a DC/DC converter; so the source and drains need to be connected directly to the pads (no series components etc...
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    If you need help with ESD... ask me in this post

    Hi ESDSolutions, I was wondering about the following: when reading about ESD, it is usually about protecting the gate of the transistor. But how about the drain/source connections (e.g. the connections of a power switching transistor)? Wouldn't the voltage at the drain/source connections go to...
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    Help needed for the design of BGR

    Help needed for BGR I haven't designed a BGR myself, but looking at your circuit diagram, it does strike me as odd; usually the PFET device sizes are a lot different (e.g. W/L=20/2 or so). And are R0 and R1 meant as a startup circuit? Usually a startup is connected at the gates of the PFETs...

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