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why to verify timing after routing stage in physical design?
why to verify timing after Star-RCXT Extraction in physical design?
Please give me the answer
how to calculate delay
hi
i want know how to calculate the delay and power in the vhdl code.
i am completeeed my coding part and i saw my results in chipscope but i want how to calculate delay and power
power
hi
how czn we get power report for the project.
i am using vhdl code i am completed my coding part and i done using fpga in chipscope but i did not get power report how can i get power report
chipscope
hi
i want procedure for the chipscope can anyone help me
my simulation part is over i got results in test bench
i want to show my putput on chipscope i tried but i got some errors due to the procedure please send the procedure
hi
i want know how to given inputs and outputs to the fpga
i am doing project 16 bit multiplication
so i got output 32 bit
but in the fpga kit there is only 8 leds for the output declaration
how can i give outputs to the fpga
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