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I've used Cadence Virtuoso for many years, but am somewhat new to Verilog or systemVerilog integration into this tool.
I've currently written a module sort of in this format (I've simplified it here):
module ABC (input x, output y);
XYZ I0 (.i(x), .o(y));
endmodule
module XYZ (input in...
Hi, I am trying to find examples of TDC used in CDRs for use between the phase detectors and digital loop filter. Thus far I could only find TDC for use in frequency acquisition in PLLs, and nothing really for CDRs. A large number of TDC circuits I found for PLL use the lower-speed reference...
Thanks for the responses. Is there some general rule of thumb for determining how large the waveport needs to be when doing this? Right now I am just visually inspecting the Port Field Display and just sizing the wave port larger than the ends of the field display.
Hi, I've read some threads on here about wave port sizing, and seems like the approach is to increase wave port size, and then check the solved ports so that it can capture all propagating modes, correct? However, for the structure I am simulating, the physical location of ports is very close...
Hi I'm not entirely sure if this should belong in this subforum or one related more to circuit simulation, but here goes.
I simulated a structure in HFSS and was able to export an equivalent *.s4p file so that I could use it in Cadence Virtuoso. However, when I run port analysis in Cadence...
Hi, is there a way for HFSS to directly plot mixed-mode s-parameters? If not, does anyone have a good guide, or equation, for a generalized conversion between single ended and mixed mode results? I'm currently simulating an 8-port network, so equations from 4-port network conversion (which are...
Is there some way to obtain a 'large-signal transfer function' for an amplifier? I'm designing a broadband amplifier and when I look at the transient waveform, there is a significant amount of overshoot and ringing, yet the small-signal analysis results in a monotonic low-pass transfer...
Couldn't find specific guides on this, but I would like to know the exact procedure to using HFSS's equivalent circuit export in Cadence Virtuoso. I'm guessing out of all the output formats, I should be using *.cir since it's a Spectre format? I don't know what instance in Cadence to call on...
I've tried a bunch of things I've read both on this forum and on cadence boards, but to no avail. I am trying to run PSS + pnoise for the clock output of the clock-data recovery circuit. However, the output load of the VCO has a rather nonlinear input impedance that is dependent both on the...
Thanks for the response. Based on your explanation, does that mean I should only expect resonance at frequencies where the characteristic impedance is unmatched to 50 Ohms? I tried to draw some simple lines in a sim tool for a 6 inch pair of microstrip lines.
The pink curve is insertion...
Thanks for the response. Sorry if this is a stupid question, but I'm still a little confused mainly about how to achieve certain lengths while maintaining monotonic insertion loss profiles. In my previous example, if I were to try and model a 3 inch trace, I would, from transmission line...
Hi, I am trying to design a trace board with multiple parallel traces, but requires operation in excess of 10GHz bandwidth from DC. Preferably I would like the channel to exhibit as linear and monotonic a transfer function as possible. I was also wondering how people circumvent things like...
Thanks for responding. I tried to use psin as well as port but it still seems a bit weird when I plot the s-parameters. I ran the sim using sp and selected all 4 ports, and then tried plotting the results using the main form. I'm expecting at least one of these to have some kind of lossy...
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