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Recent content by neocool

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    need help with designing QPSK modulator/demodulator

    Thanks I think the first one is by Russel Kliese from Queensland. I saw it in one of the papers. Thanks for the files
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    Syntax question: using WHEN statements

    So, it's allowed to use when-else-when-else statement.. I've tried it before, but I guess I've made some other mistake, so it didn't compile. The reason I wanted to avoid process and if statements is because ISE adds a latch at the output, so there is a delay of one clock. I wanted to create no...
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    Syntax question: using WHEN statements

    Hi, how do I implement something like that in one line, so that I don't drive DOUT at two locations? DOUT <= DO_higher(SAMPLE_WIDTH-1 downto 0) when (CSN='0' and RDN='0' and ADDR(8)='1'); DOUT <= DO_lower(SAMPLE_WIDTH-1 downto 0) when (CSN='0' and RDN='0' and ADDR(8)='0'); Thanks
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    What's then matter with my testbench code?

    Thanks for the great link! Are there any other good boards on VHDL and digital design? As of regards to multiplication, I was working on filter that stores results in registers.. so regular synthesis takes a lot of space.. I thought it was due to multiplication, but I guess mainly it's because...
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    How to design a Bandpass Filter using A FPGA?

    What about using Digital Filter Analyzer (DFA) from digitalfilter.com? It can generate VHDL for simulated filter design. Coefficients are stored in a ROM table and intermediate multiplication results are stored in RAM block.. then summed. I had a question for anyone who had used it before. How...
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    What's then matter with my testbench code?

    so, are you saying that using regular '*' statement from std_logic_arith library on 16-bit vectors for example will take a LOT of space comparted to distributed arithmetic? where can I find a good algorythm for distributed arithmetic? Best Regards
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    What's then matter with my testbench code?

    I have another question here on different topic but using the same code example. Is it more efficient to use multiplication here if 'period' is just an integer constant (i.e. 5*period) or to sum period five times? I know that for signals, multiplication takes quite a lot of space on fpga, but...
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    need help with designing QPSK modulator/demodulator

    I guess I have too many questions. Here is another one. Thinking about demodulation, a lot of papers refer to squaring incoming signal in order to recover the carrier (2*fc). That makes sence, I've verified it as well. Next step except filtering would be to detect zero crossings "by looking at...
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    Using correct libraries for vectors with 2s compliment no.

    Using correct libraries thanks So, which library does allow adding SLV and integer to get SLV (for counters)? In my code, I am using resulting vector with length of one extra bit to account for overflow. I.e. (10 downto 0) <= ('0' & (9 downto 0)) - ('1' & (9 downto 0)); assuming first...
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    Using correct libraries for vectors with 2s compliment no.

    Using correct libraries can I use std_logic_arith (signed and unsigned) and std_numeric (signed) libraries in the same module or it's better not to? The reason I am asking that question is because I have signed addition and subtraction in a module, and ModelSim gives a good simulation result...
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    Using correct libraries for vectors with 2s compliment no.

    Using correct libraries Hi again, In the example below, if my vectors contain 2's compliment numbers, what libraries should I use to make the code execute correctly? I don't really care about whether to use TO_SIGNED or CONV_SIGNED. I am just confused when to use which library (std_numeric...
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    Questions regarding type matching in VHDL

    Confused with libraries -edited by me- created a separate topic thank you
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    Sine Wave generation from triangular wave

    Sine Wave generation 1. How do I use RAM instead of LUT? I was using a package with WHEN statements to point to table values, so I've assumed it was LUT. 2. "which can not be saved through the cordic" I thought CORDIC takes much less in space than LUT because except the code, it has a small...
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    need help with designing QPSK modulator/demodulator

    I've looked at cordic implementation found on Opencores.org and have several questions. You have mentioned that to get different magnitude, you have to let x0=1/1.6... I got a little confused about that. It looks like initial value is assigned to K=0.6077253 to avoid multiplying answer by K...
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    Sine Wave generation from triangular wave

    Sine Wave generation Is it efficient to use a LUT if you need to have sinewaves with different magnitudes not multiples of 2 (i.e. need 3 waves for QA modulation)? If I store 256 samples per quarter of a wave (enough to build complete period by switching LUT counter), that would require 3 LUTs...
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