Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Howdy-
I'm currently designing an OTA for sigma-delta modulators. When continuous-time cmfb is utilized, all the simulations show good results. However, when I change to switched-cap cmfb, trans simulations are okay, but how to simulation the AC response? Any hints?
Re: Direct conversion becomes a common practice for CMOS rad
Wide bandwidth and spread-spectrum technique make it possible to employ direct downconversion receivers. The negative effect of DC offset and flicker noise is reduced to a negligiable level.
IEEE802.11a is very suitalbe for dir-con...
Re: corner analysis of Vth
I use ADS2003, so you can get the device info my "detailed device ...". If you use HSpice, there is a commond to extract the DC parameters and put in the *.lis file.
Usually the input signal bias is not decided by the Vdsat of a current mirror underneath, but it does...
Superhetrodyne receiver translates the RF to so-called IF by the first mixer to perform filtering and amplification. So the filter at RF and IF is refered to as Channel select filter and Image reject filter, which bring good performance. Then, the IF signal is downconverted to the baseband by...
Tanner is a good package for small scale and analog IC design. It supports full customer design methodology, like: schematic->spice simulation->layout. T-Spice and Ledit are all good, but never rely on the place and router.
The potential problem for a complicated design are:
1) Doesn't have the...
Re: corner analysis of Vth
Vth is also related to the channel DC bias. MOSIS only supports N-Well, so for a NMOSFET, the channel is always tired to ground. So the threshold voltage may be a lot higher than Vth0, when the source is not grounded.
noise figure in ic5033
When using ic5033 to do sp simulation, it looks that there is 0.4-0.5 dB noise figure loss compare to ic50 on the same LNA circuitry. Anybody has got some idea about "what's new" in ic5033?
BTW, the display and simulation speed improved a lot in ic5033.
On my RH7.2 linux box, ic5 Linux version has serious display problem when using 24 bits color. It occupies too much CPU resources when operating the wave window or layout window. Anybody encounted the same problem?
I'm just wondering that if update Xfree86 to Version 4 would help or not?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.