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synopsys dc cannot open key file
I finish all the steps above, when typing dc_shell I got error:
Fatal: Design Compiler is not enabled. (DCSH-1)
Does anybody know how to fix this? Many thanks.
basic vlsi design
Hi,
Thanks for your recommendation.
It's actually SILICON NANOELECTRONICS by Shunri Oda and David Ferry. The book can be found at gigapedia.org
verilog blocking vs non blocking assignment
Hi,
@Frank: Maybe I'm not good enough to code mix blocking and non-blocking assignments so I just simply separate them.
@Tauqueer: Please take a look at the paper I posted above. It have everything you are asking for.
synopsys design compiler
I found this link abt synopsys training materials:
Chip Synthesis
Workshop
Lab Guide
10-I-011-SLG-010 Version 2003.06SP1
Is there any newer version?
blocking and non-blocking assignments
Hi,
Correct me if I'm wrong.
There's some guideline that we should follow:
1. When modeling sequential logic, use nonblocking assignments.
2. When modeling combinational logic with an always block, use blocking assignments.
These can help you avoid all the...
gate count area
here's the equation:
gate count = Total area / area of NAND2 gate
So you got to run a simple nand2 gate to see it's area, then use the above formula
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