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Hi sanju,
thanks for the prompt response.appreciated it.
We already write the code of the design. How can i verify that the design are with sdk or without sdk? is there any specific file in sequence at the sources window on ISE design tools?
Please anyone help me. Im sorry for the silly...
Hi respective members,
I am newbie in FPGA environment. Some of my scope is to test and verified design with FPGA board. Realized that the design consist 2 type, which is :
1] design with sdk
2]design without sdk
Aware that sdk is stand for Software Development Kit. And i use ISE design tools...
Hi,
I am a newbie in FPGA environment. Kindly need any help about my problem.
I need to know how the communication between FPGA and PC. Recently, i designed some verilog code that need to download in FPGA board through serial port from PC. FPGA received and processed the command and send back...
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