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Recent content by msdnge

  1. M

    let's consider cost in IC design.

    What is the software about ? Please tell us more.
  2. M

    Why don’t use flash memory to design smart card IC?

    Thank you ! What's differrence of their application?
  3. M

    Why don’t use flash memory to design smart card IC?

    There are many kinds of Flash, such as NAND ,NOR type . What's the difference?
  4. M

    SUN and IBM PC....which one is the best for layout design?

    Re: SUN and IBM PC....which one is the best for layout desig If you are worried about the stable of your PC ,you can by HP Linux Workstation with the HP version of Linux ,it is optimized for Linux . It is more stable than common compatible PC.
  5. M

    Which Linux is good for ARM7TDMI?

    Re: RTLinux or uCLinux??? Could you please give us some good books about UCLinux development for ARM ? Thank you so much
  6. M

    How does a motion detector work?

    Re: Motion Detector!!! I need it . Please contact me @ leontsimus@yahoo.com . Thank you so much.
  7. M

    Companies which offer online free sample ordering

    free samples brazil from www.vlsi.fi for MP3 chips
  8. M

    Could somebody explain Analog IC Design Flow?

    Verilog-A is a good choice for Analog System design and simulation . And SMASH from dolphin is an excellent tool for mix-signal design.
  9. M

    How to create wire_load_model?

    As designers , we just create CWLM(Customer WLM) for our own chips. WLMs are created by Library vendors. When using CWLM/WLM , we are supposed to use the methdology of Link-to-Layout, so we can use PrimeTime with the SPEF from StarRC ( this one is accurate) or P&R tools . In VDSM, we are apt to...
  10. M

    How can i balance the clock latency in different gated clock

    Firstly, after synthesized in Synopsys, you need to inspect the structure of the gated clock tree. Then in SE or Apollo, you set proper clock tree generation constrants according to the structure. The insertion delay has to be got in several iterations. Wish you luck
  11. M

    Good links for ASIC + Synopsys oriented designers

    https://www.veripool.com and ttspice.com are also very good sites for ASIC design
  12. M

    Synthesis flow - tutorials to share

    You can find a lot of documents of design flow from the Universities in US and Canada. just google with key words design flow and .edu Good luck!
  13. M

    Synthesis flow - tutorials to share

    Yes , I am very interested in that. I also have some tutorials for that. Please enjoy that. Uploaded file: **broken link removed**

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