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3 phase supply pspice model
How can I get this parts in orcad capture cis. Is thre any tutorial concern with simple 3-pahse power supply simulation. I am using v9.2
thanks
I try to write the finite state verilog program that need to wait sometime in current state before go to next state. I used
example : repeat (10) @(posedge clk);
But error appear like this:
ERROR:Xst:850 - a.v line 32: Unsupported Event Control Statement.
Is there any other...
Is there somebody know where can I get the service manual (English version) for WLL cdma phone.
I also want to know the pin outs for that phone (Rx, Tx, and Gnd pin), use to connect to computer.
cdma basic
Where can I get (ebooks, links) to explain the follwoing terms and their functions in CDMA mobiles.
nam, esn, dll, bin, spc, flash, scr, prl.
thanks
Is there anybody know how to connect WLL phone (serial) port to computer serial port. I mean by direct serial cable or by using MAX232 ic to design cable.
thanks
latch verilog code
In my simple verilog code, I saw some warnings. I still don't know how to clear.
And seg output is always at the default.
I used Xilinx.
Somebody can help me.
My code
warnings:
counter with 7474
I am facing sometime my counter is stuck at 0 during simple 3bits upcounter by using 7474 IC.
After I reconnect again. It is work. It is happen quite often. So I need to clearify myknowledge.
Normally I connect all PREset pins to VCC and all CLeaR pins to switch. When ever...
Re: keypad scan
Dear nand_gates and echo47,
I just try to test my circuit according to both of your advice. I found that my circuit is working properly with pull down circuit (with pull down program code). I still don't know what is the reason behind that.
I just found that my programs are...
Re: How to test CPLD
Logically it seem like that, actually when I test by using simple gates (like or, and )the ports are working properly. But when I used like shift reg or FF there is no response at that port. When I switch to new cpld it work (that means my program is ok.)
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