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I have an FPGA and I want to configure it. I have JTAG cable which I can used to program it. But I want to know how to power it. I have control on all of it pins and I know it VCC and gnd pins. I want to know which VCC pins to cconnect. I connect only 1 VCC and VJtag pins only. is that right or...
I used syn_keep and syn_preserve but it doesn't work. syn_keep used to save combination cells and syn_preserve used to save sequential cells. my circuit is mix between combination and sequential cells. can you tell me how to used them.
here is the code...
I want to make A chain of inverters which begin and end with dff to make a needed delay in my research. I used libero Soc 10.1 which used Synplify to make its synthesis. The optimization which Synplify made remove my chain and replace it by 1 inverter (When the number of inverters is odd) or no...
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