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Recent content by MNBahr

  1. M

    Difference between SDL 5X and 7X process

    Hi all, I want to know what is process SDL and what is the difference between 5X and 7X
  2. M

    Salaries at Si-Vision Egypt

    Hi all, Does anyone have any information about salaries at Si-Vision Egypt ? or any other company working in the electronics and design field ?
  3. M

    Alliance CAD tool installation fail

    I'm using mandriva linux 2011 and trying to install alliance 5.0 CAD tool, installation always fails, anyone installed it properly ? if yes please provide me with a short guide. Thank you :smile:
  4. M

    Need to Put cap @ ring oscillator outline

    Can you clarify your issue what is switch control ?
  5. M

    VLSI job market in Middle East

    @khaled2k thanks so much for your help :-)
  6. M

    what is mean by cutoff voltage?

    Cutoff is the lowest voltage at which the transistor operates (linear or saturation), high and low cutoff voltages depend on the technology, as the technology goes beyond in sub-microns the cutoff is too low compared to older technologies such as 0.25um
  7. M

    Register setup time range

    Dear all, I was designing a register using MUX based latches, it is +ve edge triggered, I was having a question concerning setup time for the technology I'm using, is there any library so I can refer to so that I can check my designs ? I'm using CMOS 0.25um
  8. M

    VLSI job market in Middle East

    Thank you khaled2k for your help :smile: I am currently working on my graduation project sponsored by mentor graphics, my project aims to determine layout dependent effects (well proximity, STI, ...), I have been wondering about the future work concerning this part, i.e layout jobs available in...
  9. M

    VLSI job market in Middle East

    Hi all, is this topic still alive ? I have some questions concerning Mentor graphics
  10. M

    Help in post-layout simulations

    It is expected to have the simulation results different because of parasitic capacitance and their effects, first you have to know which capacitance have greater contribution and try to remove them, if u failed you have to consider their values in your design objectives/specifications
  11. M

    Ring Oscillator Problem

    Thanks for your help :-) do you how can I configure it ? I'm new to Mentor tools and I don't have sufficient manuals :sad:
  12. M

    Ring Oscillator Problem

    I have designed a ring oscillator using IC-Station, the problem is when I simulate the oscillations I have to use a high pulse with a small delay (1ns); the pulse is always high after 1ns till the end of the transient time, my inverters (used for ring osc) are of 0.45 nm so the supply voltage...

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