Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Re: Diffusion butting
Thank You both for the discussion.
However i don't understand problem with noise.
If I use butting i connect source with bulk with meta1.
If I don't use butting i also connect them with metal1. So both ways there will be good connection from source to substrate.
Re: Diffusion butting
Thanks for the reply erikl.
Maybe i can ask this way:
Are there any situations when i shouldn't use butting (other than different potentials on source and bulk)?
butted diffusion
Hello
I want to ask what is the advantage of using diffusion butting.
How will it work when source and bulk of transistor are on the same potential and I will place source diffusion and well tap without any space between them.
Are there any sugestions when to use butting?
Hi,
Chanell length can be larger than technology dimension.
In fact in analouge designs most of transistors have chanell length larger than minimum value.
Go to:
**broken link removed**
for opamp design tutorial.
Marcin
crystal oscillator start up resistor
Hi all and thanks for intrest in the topic.
To make clear what was my inital intrest i'am posting schamatic of my test bench and result graph. OSC is started with small pulse on vdd line.
You can see that for higher cutents oscilations grows faster...
how to reduce startup time on crystal oscillator
Thanks for reply butterfish
To make things clear my oscillator is working on 27 MHz.
In the range that I checked startup time is getting shorter if gm increases.
Marcin
crystal oscillator startup
Hi to all,
I'am working on crystal oscillator in classical Pirce configuration.
As an amplifier i use PMOS.
I want to ask if any of You know analytical relation between gm of the transistor and startup time of oscillator.
All books and articles say that startup...
Hi,
As far as I understand the problem small signal mode is used in dc and ac analysis.
Large signal models are used in tran analysis.
For example when You simulate amplifier ac characteristics You can apply 1V to the input and have thousands of Volts at output, what isn't realistic at all...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.