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Hi,
we are developement company located in EU. As our service we are offering SW/FPGA/PCB solutions at competitive prices. Our expertise is "number crunching" in FPGA(Xilinx, Lattice, Altera) backed by academic research (signal processing, numerical algorithms), protocols based on TCP/IP, high...
hi thanks for info, I also already found the wiggler JTAG interface, but what about software for flashing? this chips from atmel are quite new, that is the problem :)
well they seems very nice becouse of embedded flash, ram and ethernet :)
at91sam7x128 programmer
Hello,
iz there any GNU (read: free) software, that can program flash over JTAG interface? windows plattform is welcome :) Also appropriate schematics (wiggler?).
Regards, Matjaz
Re: counter in FPGA
becouse you're using the
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
libraries, then you don't need to vrite 1 as vector.
use simpler
cnt<=cnt+1;
:roll:
also, if you need slow counter...
use the enable in it, and make pulse every second... :)...
Re: Plasma in IC
gas inside package is probably from high temperature rise from esd "spark" :)
Added after 18 seconds:
gas inside package is probably from high temperature rise made by esd "spark" :)
hi!
i've checked the maxims adcs, but they only have multichanel sigma delta converters. they are too slow (both the sampling frequency and the processing delay). we need about 10kHz per chanel. currently we have "pulsar" family adc on board. the first layout is not very good, there is about...
hi,
we have problems with analog multiplexer (dg406), becouse of crosstalk between chanels. at the imput, there are lf358 operation amplifiers, but they are disturbed with "parasitic switch" inside multiplexer which one short circuit input to negative voltage at channel change.
we solve some...
impact-2257
you have to set the statup clock :)
it must be set to CCLK
you'll find it under
generate programing file->properties->startup options->FPGA start up clock,
choose CCLK for booting from prom
and JTAG to boot over JTAG
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