Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
SNR for Motorola C-139
Hi everybody
I'm just looking for Signal-to-Noise Rate for Motorola C-139 cell phone.
or
where can I find that info?
Thanks in advance.
As you said early, the literacy also said that an oscillator start automaticly because of noise or gain more than unity. But, in real and realiable integrated LC oscillator, I guess at a START CIRCUIT must be applyed.
I would like to know your suggestions about these kind of circuits.
Hi,
I have recently worked on an integrated LC oscilator design, and I didn't realize about how it would start (experimentally)
Somebody who has a lot of experience on this field suggested me about adding a STARTING CIRCUIT...
I'd like to know which STARTING CIRCUIT topologies there are, and...
Hi
I have designed a differential VCO LC with Fo=2.44 GHz, and a voltage swing about 1.0 V.
How can I match tank impedance with a probe impedance (about 50 ohms)??
Re: VCO starting constrain
Is the VCO starup constrain related with synthesizer control signal bandwidth ??
I mean, increasing "alpha" LC tank poles are rigth shifted, decreasing damping and decreasing "Tao" for exponential envelope.
isf nmf
Acording to phase noise theory (Hajimiri et al.), how to measure ISF (Impulse Sensitivity Function) in a complementary LC-VCO. ??
How to do it in a SPICE-based simulators (e.g. ELDO, HSPICE) ??
VCO starting constrain
According with some reported VCO designs, active transconductance must overcome to tank transconductance, at least, in a factor of three (that they call "alpha" factor, or safety factor)
Why this amount?
I guess that it's not completelly true. As you increase "alpha"...
Upconverted flicker noise is made with the noise contributions from each harmonic, which are modulated by central fequency. According with phase noise theory (Hajimiri et. al), the accumulative noise near to central frequency depends to 1/(2*pi*f)^3. Base-band flicker noise gives a great...
Hi
I'm working in a VCO design applying ELDO. As a autonomous circuit, VCO frequency is supposed by ELDO steady-state analysis, with a given initial frequency guess.
Appliying a probe between two nodes, ELDO gets an oscillation frequency. How accuracy is it?
Sometimes, oscillation...
Re: Differential VCO, Short or High Resistance at control po
In order to get a symetrical AC circuit, Vcont must be AC ground. So, you can divide VCO into halves, and carry on simple small signal analysis.
varactor layout and quality factor
Modifying geometry, only change max. and min. capacitance values, also quality factor.
does exists any way to change C-V slope for accumulation varactor ??
I want to decrease its slope, because the gain of linear region is so high, and very small signal...
Hi....
After all, you must define a sample frequency. According to Nyquist theorem, you must sample at least twice greater frequency. Actually, it would be better increasing sample frequency to reach more accuracy.
Once upon you have choose a sample frequency (Fs), you may redefine a time...
varactor layout
Hi...
How can I fix AMOS (accumulation MOS) - varactor's variables design to reach a minimun and maximun capacitance ?
How can I layout this device ?
I heard about split layout varactor into "rows" and "columns". Why ?
Best Regards
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
