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Well,thank u very much!!
I'm a master degree fresh man , i think 802.16 is a very hot topic and is for future application. As for 802.16e , i don't think it would take the place of 3G or get a big apportion in voice application which contribute the most of income .We have devoted much in 3G ...
detection estimation van trees rapidshare
I've read rappaport's book , it's great! It includes many aspects and it gives me an wide view about wireless communication . Some chapters are interesting and easy to understand. Helpfull.
This semester, l learned mobile communication . And we are called to complete one article on one of the following subjects:
1\ mobile wireless communication theory
2\ Zigbee
3\ IEEE 802.11
4\IEEE 802.16
5\ Bluetooth
6\ WSN
7\ Ad-hoc
any paper about Mac/routing/protocols/and simulations will be...
offset-QPSK could have constant evelope if not pulse-shaped.
In Lap's book ,about O-QPSK, to explain why use offset , he says when the constellation variation is pi, the evelope may go across zero , and at that time the signal is small which would be hard to amplify linearly, then spectrum...
I have just the same doubt.
How to minimize offset in circuit design and layout?
Could anyone show some general method to improve the offset issue.
Thx in advance.
regards.
marlboro_x
Thx digitalheart.
U showed such a good method.But it was not suitable for me.I want an on-chip delay circuit.
Teddy:
i use the way u just tell me.It was area-wasted for the big Cap.I wanna know how to modify the method or other architecture be used?
Thx all.
scincerely .
marlboro_x
As the title says.Could anyone guide me to some material?
Thx very much.
sincerely...
marlboro_x
Added after 1 hours 8 minutes:
When the signal is high,output should be high after about 150mS.
I used a PMOS current source to charge the Capacitor,followed by several inverters. The Cap is MOS...
dracula drc lvs
Could anybody help me ?
I've wrote this message on several bbs and have waiting for couple of days .
Is it really that nobody know the answer?
Thx in advance.
Recently i will use dracula for layout verification.
Now i already have the DRC/LVS/ERC..files.The problem is how to get into the DRACULA enviroment?
It is said that there is a command file for dracula like mydrc.com,but i didn't find it,of course i can't edit.
Who can tell me where is it or...
Re: about DRACULA
Could anybody answer that question?Or any suggestion would be nice.
I've waited for couple of days ,its so pity no body comes in and make an answer.
Thx very much.
Best Regards
marlboro_x
about DRACULA
Recently i will use dracula for layout verification.
Now i already have the DRC/LVS/ERC..files.The problem is how to get into the DRACULA enviroment?
It is said that there is a command file for dracula like mydrc.com,but i didn't find it,of course i can't edit.
Who...
i/o buffer+cmos logic
pixel:
It's true that the W/L of next stage should be 2.72times the former.But I found the book u guided is talking about ASIC,and i haven't so much points to d/l.Is there any material smaller ?
dumbfrog:
U R absolutely right.I've read some paper saying...
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