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primetime manual
You can find manual by synopsys' application engineer.
Others you should understand basically theory about PrimeTime, then you can write some tcl file about PrimeTime for your circuit and analyse timing of your circuit base on your tcl file. If you think that timing is not...
bitcell size for single and dual port sram
OKay. But when you select dualport ram or singleport ram, you should be base on your circuit in fact. i.e speed of circuit and data throughput etc
If let your circuit must meet timing and function of timing after P&R, you have better do clock tree synthesis. It was done by CTS tool.
logic synthesis is process that translate RTL description to gate netlist.
does pspice accept gds files ?
You can run LPE(in fact it is LVS) while you think from GDS netlist to SPICE netlist. But you should add some parameter in you .lpe file. i.e. cap, res etc.
Re: about physical design
Thers are some books you can look:
1 IC design
2 IC Mask design
3 The Art of Analog Layout
4 CMOS Circuit Design,Layout,and Simulation
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