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Recent content by Manolis Grifoman

  1. M

    [Moved]: I want to use a smaller MOSFET than 65nm for Hybrid SET/CMOS simulation

    Thank you for the information! Do you know maybe what "empty" transistor model can I use from breakout so I can simulate the lvl 54 transistors correctly?
  2. M

    [Moved]: I want to use a smaller MOSFET than 65nm for Hybrid SET/CMOS simulation

    Hello! I designed a hybrid circuit consisting of MOSFET and Single Electron Transistors. For this, I used the model BSIM4.8.0. 65nm. I want to use a "smaller" transistor. So, I found one... At least, a hypothetical one... The PTM 45nm. The problem is... In the parameters i find: Level=54. So, I...
  3. M

    [moved] Converting a Verilog-A module to a PSpice netlist model

    Hello! I am new to PSpice. I want to simulate a circuit in PSpice but the model I have in my disposal, is a Verilog-A file. How can I make a model in Cadence from this file? Or... Can I import this file into my PSpice netlist somehow? Thank you!
  4. M

    Orcad PSpice 16.5 ERROR

    Oh it's ok. I fixed it. It turns out the extention I was using (SECS simulator) for PSpice, needed Matlab for the simulation. Is there a chance to explain to me why the nodes are so important? I thought the nodes were where 3 or more wires meet. But I see that sometimes the simulator needs a...
  5. M

    Orcad PSpice 16.5 ERROR

    Hello guys! I have a problem. I am using PSpice to simulate single electron transistors. I have the single electron library and all that. I made a circuit that has junctions. The junctions have resistance and capacity. My simulation doesn't recognize resistance as a parameter, only the capacity...

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