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Recent content by malesky

  1. M

    pipeline ADC SNR for help?

    hi everyone I am trying to simulate ADC for SFDR,SNR,THD and SNDR. The MATLAB code is attached as below. I am new in MATLAB and couldn't fully understand the program. To simulate, I input low frequency sinewave signal and the ADC is running at 50Ms/s. (1) Can somebody explain the program...
  2. M

    Spetre/Verilog simulator question

    thank you very much,dick_freebird! I do just as you said to rewritten the verilog code and initialize the output value. Then simulation..... There comes no error and waveform appears. But the digitial output is constant all the time which is not right. I don't know where to put the 1-ohm...
  3. M

    Spetre/Verilog simulator question

    Dear all, I am mew for analog cricuit design.I have IC5.1.41 & LDV5.1 Currently I use Spetreverilog simulator for a mixed-signal simulation. After simulation ,there are 3 errors: Error in cleaning up IPC in an attempt to quit. Error in DC simulation for mixed-mode. Error found by spectre...

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