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Recent content by Makni

  1. M

    multicore leon3 with snapgear linux

    Hi everybody, I have implemented the Leon3MP architecture with two processors on virtex5 ML507 board and I want to run an application using the multiprocessors. I want to test the multicore architecture with leon3. I don't know what kind of application I could do. Please, can you give me...
  2. M

    Multicore Leon3 without OS

    Hi everybody, I'm working on a MultiCore project with Leon3. I've configured a design with 2 Leon3-Cores (via make xconfig. I want to know how can each core executes his own code c without OS? for example having 2 instanciated cores where the 1st core executes test0.c, the 2nd executes...
  3. M

    communication problem between microblaze and custom processor

    Hi, Thanks a lot for your reply. I have chipscope analyser. But I didn't use it before. Could you give me any links or tutorial on this. I would be very grateful.
  4. M

    communication problem between microblaze and custom processor

    Hi everybody, I'm working with EDK 12.4 and ML507 VIRTEX5 board and I'm implementing a custom processor (written in Verilog) that uses RAM which is created from Block RAMs. I have connected my custom processor (slave) to a MicroBlaze (master) via FSL BUS. Then, I have written the BMM file "by...
  5. M

    how to generate a bmm file ?

    Hi everybody, I'm trying to create a BMM file from an NCD and uses this to read and write initial BRAM contents from a bitstream. I have generated an elf executable from a c code. I read the Datasheet of the data2mem tool but the problem is this tool take always a bmm file as an input and not...
  6. M

    Virtex5 and ISE Xilinx support

    Hi everybody, I'am using FPGA virtex5 on ML507 board. I need to install the old version Xilinx ISE 7.1, but I want to know if this old version is supported by virtex5 or not? Can you help me please. Thanks in advance
  7. M

    tool to transform .elf to .mem

    Thank you for your help - - - Updated - - - I have another question please, I would like to know if it is possible to transform the resulting mem file to a file.rom (or.hex). I would appreciate any help on this.
  8. M

    tool to transform .elf to .mem

    Hi everybody, I am working on FPGA virtex5 and EDK xilinx 12.4. I look for a tool which can transform the executable.elf (generated by the microblaze execution) to a mem file ( extension .mem). Thanks in advance.
  9. M

    What are the softcores opencores for xilinx

    Hi everybody, I want to know what are the softcores processors opencore available for xilinx. I am working with the board ML507 virtex5. In fact, My goal is implementing an heterogeneous architecture composed of Microblaze and another softcore opencore processor which I can interface it with...
  10. M

    How many power pc processors that can be implemented on virtex5 ?

    Thanks for your help :)
  11. M

    How many power pc processors that can be implemented on virtex5 ?

    Hi everybody, Actually, I want to implement an heterogeneous MPSoC architecture with Power pc and Microblaze. My question is can I added more than powerpc on virtex5, how many power pc can be implemented on this board? Thanks in advance.
  12. M

    data read write to DDR2 SDRAM memory between microblaze and custom IP using PLB Bus

    Thanks for your reply. I have already write a data image to DDR2 SDRAM extern memory, // get the base address of SDRAM memory extern to FPGA int baseaddress = XPAR_DDR2_SDRAM_MPMC_BASEADDR; //declare a pointer to int (add4 to baseadress) volatile int *txframe = (volatile int *)baseaddress...
  13. M

    data read write to DDR2 SDRAM memory between microblaze and custom IP using PLB Bus

    Hi everyBody, I implement an xps system by using the Bus PLB. My IP core is added to the system using Create or Import Peripheral... I want to know how can Microblaze write several data to DDR2 SDRAM and how the IP core read all the data from this memory, modify it and write it back to DDR2...
  14. M

    How to create a MicroBlaze-based Multi-Processor interconnected using a NOC?

    Hi everybody, I designed a multi Microblaze processor system with four Microblaze processors using the board ML507 using the Xilinx EDK Project. My goal is to create a Microblaze-based multiprocessor system on chip interconnected using a Network on chip (NOC) with a mesh topology. Can you help...
  15. M

    The softcore processor PicoBlaze is an OpenCore or not?

    Thanks a lot for your reply :) I am working with the board Virtex 5 ML507 and the version 12.4 of xilinx ISE, but the problem is that this xilinx device doesn't support the picoblaze softcore. So, I want to know what are the other boards (Xilinx devices) which support the PicoBlaze SoftCore...
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