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it depends on your starting point. Once i did it by building a cross library by hand, e.g. by mapping the cells of the old library in cells of the new one.
But i think that Synopsys DC Compiler can handle this for you, supposing
you have compatible libraries
mab
i never used it but from what i read time ago in synopsys docs, you have to
put together in a suitable simulation environment the 386 BFM
(Bus Functional Model) and the Xilinx VHDL code. Then you write
some simulation cycles for the 386 and let the simulation engine
execute it and watch how your...
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