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Recent content by llc1kitty

  1. L

    op amp simulation issues

    about the sim of the common mode input range u can use open loop op-amp with a reasonable input common mode voltage with AC=1 in positive input and the same input common mode voltage with a small differential offset voltage at negative input. Then u sweep the small offset voltage to get a...
  2. L

    Looking for resources to learn Cadence

    help !cadence ! u can browse the cadence web site for free docs.
  3. L

    How to design a CMOS level shift buffer

    simply one stage op-amp is enough. But you should pay attention to AC characteristics of the regulator circuit.
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    What MOS should be used (N-type or P-type) in LDO driver?

    About LDO driver it easier to get larger phase margin and high gain using NMOS.But it depends on your overhead voltage to select NMOS or PMOS
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    hspice Convergence contol?

    get .ic file use iterative .op using smaller and smaller gmin, then use the .ic file when gmin is smaller than 1e-9. This can help to solve the problem

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