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I tried that, but still failed to extract all the fingers. In the av_extracted view, symbol of transistor looks to have multi finger, but when I checked its property, it still have only one finger, and the same with netlist. Really strange.
I tried that, but still failed to extract all the fingers. In the av_extracted view, symbol of transistor looks to have multi finger, but when I checked its property, it still have only one finger, and the same with netlist. Really strange.
I checked the whole view, but there is only one transistor there. Even if I didn't find them, they should exist in the netlist, but not. Now i have to contact MOSIS for this issue. Thank you for your replies!
Hi, I am using Assura to extract layout (pdk: tsmc35). In the layout, I have a transistor with width of 19.5u and finger of 10, the total width is 195u. But in the av_extracted view, I check the property of that transistor, and find its size is w=19.5u and finger=1, m=1. Then i did post-layout...
I need several different random signals to test my design. So I use rand_bit_stream in adhlLib. It does produce random signals. But what I want is I can control the randon signal. For examples, I need to do 100 runs of monte carlo simulation.
I hope the input random signals for rhese 100 runs...
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