Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
quantization noise in sigma delta
Hi all,
The digital sigma delta modulator is a 3rd order mash 1-1-1 digital modulator and the output range is -3~4. The operation frequency is fs. What I care is the output noise magnitude at (2N+1)*fs/2.
Firstly, I did a transient simulation and do FFT for...
Re: vco bias circuit noise
If the VCO is an LC architecture, you should put a regulator to provide the supply voltage of the VCO!
Added after 4 minutes:
You may consider to use a LC-VCO without tail current
Re: Noise Simulation
If I want to get a very low noise voltage reference (less than 10nV), with kind of circuit I should choose: PTAT, Vt/R or something else?
thx!!
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.