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Recent content by Lantis

  1. L

    question about ladder filter design

    I am currently designing a LC ladder filter. I have already derived the filter transfer function from matlab. It's 5th order inverse-chebyshev filter. However, I have no idea how to implement it with LC ladder filter. what's the cirucit topology? How much the L and C value? (By the way, I want...
  2. L

    Pipeline Modeling in Simulink

    Pipeline Modeling Doubt I think m-function is enough for you to model it. S function is not necesarry.
  3. L

    problem about bootstrap switch

    bootstrap switch I got some problem about bootstrap switch (as shown in the bootstrap.jpg). Vin is connected to a source voltage with input impedance about 50ohm, and input common voltage is 1.5V. When I connect it with bootstrap switch, Vin common voltage becomes 0.4V but I did not know...
  4. L

    Question about ADC measurement

    A 90MHz sampling rate(conversion rate) 6bit ADC, for testing convenience, I combine two consecutive ouput codes into a 12 bits data outputs with 45MHz. Is it ok to perform FFT on only 6bits outputs? (that is, only odd output code of 90 MHz samples.) Thank you very much.
  5. L

    Post-simulation questions

    Hi ilter, "Perl" can handel it very easily. You can try it by yourself to write a small Perl program. Good luck.
  6. L

    Post-simulation questions

    Use perl to remove small parasitic cap (< 1e-15). It will help reduce file size.
  7. L

    Problem about hspice simulation

    try .op 1.5u
  8. L

    single ended to differential

    How could I got the differential input sine wave if I only have one singe ended input source generator? Is transformer a good choice? How to use it? Thanks!
  9. L

    ADC ENOB TEST (MSE method)

    adc enob HI! Does any body know how to use MSE (sine wave curve fit)method to find out ADC ENOB? What's the pros and cons? How to implement with MATLAB? Thanks!!
  10. L

    ADC reference voltage circuit

    Thanks for your replying. However, I did not have a VREF Pin outside the chip.
  11. L

    is this wrong phase plot?

    This opamp phase margin is -58, not + 58. It's unstable. At DC, the phase is 180, at unit-gain freq, the phase is about -58. That is , the phase shife is more than 180. I guess you use two-stage opamp, and the RHP zero is not cancelled by the nulled resistor. It's my opinion, I hope it will...
  12. L

    ADC reference voltage circuit

    I have designed a 6bit Pipelined ADC. However, I got some problem when i design the reference voltage circuit. Because I have no output pad for VREFP(1.75V) and VREFN (1.25V) , so I add a large cap (about 400pF) on chip. I wonder which kind of OPAMP I should use. For a one stage( folded) opamp...
  13. L

    Adding AS,AD,PS,PD to the MDAC

    AS,AD,PS,PD? Thanks for your replys. I try to use a tool (HSPC) which can automatic add AS/AD/PS/PD parameters. **broken link removed** Any comment about this tool? Thanks!!
  14. L

    Adding AS,AD,PS,PD to the MDAC

    as ad ps pd mos I am currently designing a 10bit 37MHZ pipelined ADC. I wonder should I add AS,AD,PS,PD in the S/H & first stage comparator,MDAC. Any body could give me some advice? When should I concern the mos parasitic cap of AS/AD/PS/PD ? Thanks !
  15. L

    How to import Hspice (PC) simulation data to Matlab (PC)?

    you must add ".options post=1" in your spice file.
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