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Hi Kethness,
Common fabrication houses have limited competency to produce 2mil pad ring. Consult with your workshop if they can do it.
Your board cost will increase as you go lower on trace width and gap. Widely used trace width and gap is 6 mils and via pad ring is 10 mils.
Hi Kennolde,
Your stackup is symmetrical and balanced as copper weights are equal on both sides of core. This makes it a standard 6-layer stackup.
But this would not be the best if your are using it for EMI/EMC application. I would recommend this:
There are 4 things that make this stackup work...
Hello Techies,
I am working on a LoRAWAN enabled node using Microchip LoRAWAN module RN2483.
I want to utilize the on-chip MCU (no external host MCU) and connect some sensors via available GPIOs, and relay the sensor data via LoRa to gateway.
Can we use the on-chip EEPROM and on-chip MCU for...
Hi Klaus,
USB ports are device and OTG.
Thanks,
Lalit
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Hi Andre,
Allwinner-A10 is a good controller but I cannot go with the Chinese product as of now.
How about i.MX537 from NXP? This seems to be a suitable one.
Regards,
Lalit
Hello Techies,
I am working on a 4G/LTE router hardware design and currently at Microcontroller selection stage.
Design is going to have following interfaces:
5 Digital I/O's
5 Analog I/O's
2 RJ45 port – Ethernet Connectivity
2 RS232/RS 485 Port
2 USB Ports
1 HDMI Port
LTE/4G Cellular...
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