Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by lahaha

  1. L

    Assura RCX problem in sparc Solaris

    After renew the license, I run the Assura RCX with error. (DRC and LVS are alright) But it is only happened in sparc Solaris machine, it is alright in x86 Linux machine. I use same layout to do the test. Both Linux and Solaris use IC5141 and Assura3.1.7. Please help! RCX Error message...
  2. L

    The detailed path of spdaemon of Cadence license?

    Is there anyone know the detail path of spdaemon of Cadence license? Please help!
  3. L

    About license of Cadence

    Could you say more detail about the path? Many thanks!
  4. L

    About license of Cadence

    Is there anyone know the path of spdaemon in cadence license? DAEMON spdaemon ./spdaemon Please help!
  5. L

    How to set the ng of nmos4 in the Cadence schematic?

    I would like to know how to set the ng of nmos4 in the Cadence schematic? Please help!
  6. L

    Spartan-3 starter board

    Yes! I got such things. But how can I find the original test program in the board and how can I recover it. I found it in this page: http://www.xilinx-china.com/products/boards/DO-SPAR3-DK/reference_designs.htm Please help!
  7. L

    Spartan-3 starter board

    I have tried it, but it is different to the default test. The default test will test : ISSI SRAM memory, 7 Segment display, LED, VGA, RS232, Switch, Platform FLASH read, buttons. Also, it will keep in the prom.
  8. L

    Spartan-3 starter board

    The one I found in the Digilent was not the default test program. I found a PROM.ZIP in Xilinx which have a instruction about how to recover the default test program. But I still cannot recover it. It have attached the zip file. Please help!
  9. L

    Spartan-3 starter board

    I have the Digilent Spartan-3 starter board. The Initial test is the default test of the board. It tests several feature of the board. But I erase it. I would like to recover it now. Please help!
  10. L

    Spartan-3 starter board

    spartan board 7 segment display I would like to know how to recover the initial test of Spartan-3 starter board. Please help!
  11. L

    Verilog-XL simulation error

    How to include it? Please help!
  12. L

    Verilog-XL simulation error

    When I tried to simulate a invertor with Verilog-XL, I got an two errors (1) Module or primitive (nmos3) not defined "ihnl/cds0/netlist", 19:nmos3 MN0(.D(Out),.G(In),.S(cds_globals.gnd-)); (2) is similar to (1), but it is pmos3 I am using gpdk for this simulation. Is it the setting problem...
  13. L

    Spectre error with gpdk

    You are correct! But I need to edit the spectre.include directly. Thank you very much!
  14. L

    Spectre error with gpdk

    Thank you for your answer! I got the same kind of error "...../models/gpdk.scs" 6:Illegal library definition found in netlist I check the model file, the illegal library it said is gpdk. Also I check the technology library of the library is gpdk. Please help!
  15. L

    Spectre error with gpdk

    I am a beginner of IC design. When I use the gpdk to draw a schematic and use spectre to do the simulation, I got some errors in spectre. si_inp: MN0 is an instance of an undefined model nmos1. si_inp: MP0 is an instance of an undefined model pmos1. Then I set the model included files for it...

Part and Inventory Search

Back
Top