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For many days, I have worked with ADV7190. I have some problem with ADV7190 normal operation. I had checked reference volatage and other check point. But I couldn't it working. Why that IC would not worked. It uses I2C control bus. I check register setting also. It was fine. If anyone who has...
atpg test_setup
Hi,
I had synthesis some logics and got a ATPG results.
ATPG tool reports 99.8% fault coverage.
And ATPG tools simulated by itself and reported no error.
But I have differnet results between ATPG simulator and NC-verilog simulator.
when I simulates with NC-verilog, next error...
About Scan insertion
Is anybody who has scan script with SMIC ot TSMC standard cell libraries?
I have suffered some problem in scan inserting.
I used 0.18um standard cell libraries form SMIC.
I don't know why some problems are occured like that.
This is my first time that I have suffered these...
Nowdays mobile camera phone is issued.
So, I want to design anti-rolling system (image stabilizer system) in mobile phone camera module.
I want to get anti-rolling algorithm and hardware verification system.
In case of camcorder, there are may algorithms and hardware systems.
But they are not...
I wants to make clock recovery PLL with external discrete devices.
How can I make 27Mhz VCO with discrete devicces?
Dividers will be implemented with altera FPGA chip.
And Philips's 74HCT9046 phase comparator is selected for PD.
Alaso 2nd oder low pass filter is selected for loop fiters.
But I...
Re: HSPICE on PC and SPARC
Please use HSPICE2003 PC veersion. May be it has more accuracies compare with old version.
But the differece between PC and UNIX machine is still exist.
Maybe the reason of different accuracy comes from CPU floating point calculation accuracy.
Hi,
Color interpolation has same methodology with LCD image processing.
Using 2 line buffer, you can get enough image quality.
But you must have proper algorithm about anti-aliasing and other things.
In case of LCD displaying, LCD can not support enough color quality.
But CRT has enough color...
Hi,
Please use Verilog-XL or NC-verilog. You can encrypt your source code.
Please use 'protect and 'unprotect option to your source code.
You can encrypt your source code from start line to end line that you want to protect.
But once you have protected your source code, you can not decrypt...
pipelined jpeg encoder in verilog (source code)
Hi,
I have srached JPEG decoder source code and related documentation.
Please let me get it.
Thank you.
affirma_sim_analysis_env
Hi,
I installed ldv3.4 in Unix machine.
I tested ncsim or ncvlog. It works well. But signascan haven't worked well.
When I invoke signalscan, always next message is displayed.
Signalscan 6.7s8:
Unable to obtain license.
(LM-12) Unable to obtain a license for version...
Please use ACS(Auto Chip Synthesis)
Some people always upload infommation about ACS.
Please download manuals and lab materials.
It is a small risc core for exemple.
It is very convinient methodology for sysnthesis.
20 ~ 30 line description for full chip is all.
x-HDL problem
I had used X-HDL. But now I have not used it. I think X-HDL can not trasfer correct verilog RTL code. It has many problem. The codes that comes from X-HDL, should be changed by manual. I think it is not proper tools for VHDL2Verilog or Verilog2VHDL.
ACS works on Linux
Hi,
ACS works on Linux also. But you can use dc_shell -t option. Becasue it is based TCL. And you should modify setup file for ACS.
Thanks
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