Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi
Could any body please tell me ...Is there any chance of getting both setup and hold viloation for the same register(for the same path)? If so what could be the solution?
Thanks in advance.
what is negative slack
Hi Phutane,
Thank you for ur prompt reply.
So according to the eaquations provided here, does it mean either of the slack would negative? i.e., either slack(setup) or slack(hold) will be definitely negative?
I googled the definiton for slack, but evrywhere it was...
negative slack
What happens to respective setup and hold times .....with positive and negative slacks? reeally confused between negative setup,hold snd slacks......Please somebody explain?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.