Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Yes, "T" refers to the max. temperature rise the board will work at and the track is subject to accomodate the drop due to the operational rise in temp. The ambient temp. is assumed to be 25degC here.
Derating constant is not related to plating constant since it changes for outer and inner layers.
I agree... the USB seems to be the most in-expensive solution on the part of cost and development. Do you have the USB port on the device you want to communicate with or have you thought about using Parallel port?
Besides FTDI you may also look at MOXA ready to use cables **broken link removed** , BAFO http://www.bafo.com/products_bf-810_S.asp
but surely 8Mbps is probably not possible with both of them. What's the application? You may like to consider USB as a better option for these kind of data rates.
The NXP controller you are using must have a SPI interface. Just get the spec of SD card from web and hook up the SD card pins to the uC. Initialize the SPI interface at a slow clock rate 1-2MHz first (will be easy to debug).
At the max. you can expect 20usec of access time for the first byte...
The below link shows that there is a built-in gerber viewer in Ultiboard. Please go through the instructions to open it. You will be able to see all the layers whether conductive or non-conductive.
**broken link removed**
You can download it from GNU ARM™ toolchain for CygWin, Linux and MacOS
All you need is there. Next time post your threads on software in the most appropriate category.
If you set the scope on AC coupling then it shouldn't load your DUT. Basically, if possible you should limit the higher frequency side too by limiting it to 20MHz if possible. Just keep the vertical divisions set to 5 or 10mV and time scale to 1/10 of a second, x1 on the probe is fine. You...
You are drawing a heavy current of ~500mA from the source. There won't be any loading by connecting to scope. The scope input impedance is at least in MOhms. I hope that I understood your query.
It seems your component is through hole. All you need to do is create a footprint which will comprise of a number of pin holes (PTH). While in PCB layout, just place the component footprint on the board space and you will see pin holes will automatically connect top to bottom layer. I hope this...
Google PrimoPDF, it is for free and you can print a PDF with it like anything you would do with paper printer. After installation, just while printing out docs select PrimoPDF.
I didn't get what do you mean by "pin holes".
-kjs
I thnk Ray has provided good explanation to your query. If you read his description while viewing timing diagram of any SDRAM/DDR memory datasheet, it should help you. The DRAM memories latch the data with DQS signals and not clock.
But during layout of the PCB, the DQS and clock should be...
Well, I'd say the designer could have done a better job there too. The notes on master drawing should say about impedance control so that the manufacturer denies doing that job.
-kjs
IPC helps designer adopt standard conventions for the PCB footprints in the standard IPC-7351B. Please go through the below link. Its free to download.
**broken link removed**
I agree to Nelson... Also, I think the Orcad PCB editor calls it with the name of "Obstacles" if I'm correct. You can define any shape and then place your stitching vias to ground. It should take thermal relief by itself if you define obstacle with the name of your ground plane.
Also, there is...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
