Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi thank you it really helped me.
Can you please tell me if i create (asymmetric) MOS structure with drain diffusion depth (Xj drain) deeper than source diffusion depth (Xj source) then what would be its advantage over the corresponding symmetric structure.
Because i had actually...
Hello, can you please tell me what would be the code to have a 2nm gate oxide thickness, i mean i don't know what values of diff time and temp are to be taken to achieve Tox=2nm. Thank you.
Hello sir, thank you so much for your valuable suggestion. I could implement the asymmetric MOSFET successfully.
Can you please further guide me if i want to scale down the gate length to 40 nm, what would be the probable change that i must make in mos1ex01 code?
Silvaco Code for asymmetric mosfet with LDD only at the source side.
Hi,
Can anyone please tell me what is the silvaco code or program flow if i want to go for an asymmetric MOSFET with LDD at the source side only. I tried my level best to make the changes in mos1ex01 code so that i could...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
