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Of course you can! But there will be consequences! Hahaha.
Just to point out, you need to clarify what you're asking in order to get any help. Which width are you talking about? Have you checked PDK documents? What's the concern? Do you need absolute limits or suggested limits?
Q1: Refer to your PDK. 1um per 1mA is a rule of thumb thingy, it's not always correct for all the processes. Your PDK would have a section for metal current density rules and they usually report RMS and peak density each metal layer can handle separately. For example a metal layer that can...
It really depends on what you're trying to do, there isn't a single solution to rule them all.
In both of these drawings signals cross each other. The difference is which group of signals are coupling more to the tail node, gates or drains and which signal is routed longer which may expose it...
You need some residue integration (basically delta sigma) or very well controlled dithering (basically modulation with a known waveform, even then I'm not sure if it's a good solution) to make it work. The FFT of a DC signal is a unit impulse at 0Hz, it doesn't have any dBs or whatever that you...
The kT/C noise is just there independent of your input amplitude. So if you want to sample something really small then yeah you need to handle large caps unless there's something else you can change in the architecture.
There are two ways around it that I can think of. First is using an...
The short answer is that you could if you had an RF sampling ADC and implement the mixers in digital. But you would still need the mixers.
In a system like this, I and Q channels are orthogonal to each other (they can't be represented as each other, they complete the I/Q plane). Think of mixer...
If you mean transistor X9, its Vds voltage is actually forced by the input common mode. In detail: in conventional operation the differential inputs would be close enough (real ground should be close to virtual ground even if the DC voltages are different) so two input transistors sink almost...
It may sound stupid but you may want to delete the spaces in Rg = 3 statement. It's unlikely but worth a try. Otherwise I guess the best option would be trying out Cadence's import tools.
Re: Telescopic opamp psrr strange output
I don't want to debug your simulation setup, but it looks like what you are doing is the right way to measure the gain from supply. In most cases however PSRR is defined as signal gain / gain from the supply input, so if you have 80 dB gain at DC and 1...
Re: Telescopic opamp psrr strange output
I don't think it's strange. You are measuring gain from supply and your supply gain is I guess 1.05 or something but your signal gain should be much larger than this, maybe 80dB or so. You'd usually care about signal gain/supply gain because in a loop...
Depends entirely on the design really. Top metals are usually allocated for supply and ground but if there's more than one supply it is not unusual to use the same metal for two supplies and ground. Mainly because top metals are usually thicker and better to use them for high current lines...
Not just the vias, it is often a good practice not to put lower metal layers over the gate for matching critical components (Vth matching gets worse). I'm sure you can find explanations for this on the internet, I'm not very confident about my processing knowledge so I wouldn't want to say...
I do not know, I need to check the manual.
Logically if there's a parameter that depends on Leff or Weff it'll probably get interpolated, for the rest there's not much you can do so they'll just be whatever in the parameters. It's just a guess though I do not know.
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