Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
Problem: Monitor displays blank state
I am trying to display images on a monitor. I am using the VGA controller code provided by Digilent that uses a 25Mhz from a DCM and outputs HS and VS signals (which I tested for correct timing). The controller also provides two 11bit...
I tried FvM's suggestion and used "AND" and it worked. I am new to VHDL and crossing over from Verilog.
I wonder if mo.khairy.mo's tip, will work outside the process () block. Its a 25 min compile so haven't tried it yet. But thanks anyway guys.
Hi,
The following statement does not parse.
RGB_OUT_local <= video_ram(conv_integer(conv_integer(vecHcount_640_60)+(176*conv_integer(vecVcount_640_60))))
when ((vecHcount_640_60 < 176) && (vecVcount_640_60 < 144)) else (others => '0');
I found that when I remove one...
Hi,
I am from India, currently a graduate student living in Philadelphia. I have a Digilent Basys 2 board which I want to sell for$49. I can shipped it to you with USPS tracking for $49 + $30. I received a similar shipping when I was in India and no customs apply for such private...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
