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Hello ,
what is END POINT SLACK ?
and what is differnce between slack showed when we give report_timing command in synopsys dc_compiler and this END Point slack ?
hello sir,
Actually i have a transistor level circuit diagram of a clock buffer.By taking it as base , i have to design layout and characterize the libraray for that buffer.
And then i have to compare the results of this buffer with the results of the normal buffer after designing it as project.
Hello sir,
sorry for asking unclear question, here i explain them
MS means Master of Science , It is equivalent to M.Tech degree.
I am doing it in the field of VLSI.
Buffer in the sense , it is also a standard cell like AND,NAND,NOR etc. So , i have mentioned
like buffer cell.
up to my...
i am doing my MS project in physical design domain , i was supposed to design a buffer cell .Can any body tell me what are the basic to be known for designing clock buffer ?
can any one please tell me about smart clock gate placement and register clumping in physical design placement of vlsi ??
please reply me quickly ... please
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