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Thanks for your answer.
but how to calculate the different capacistances from the 3db freq, for example I need to know the value of cgs, cgd, cgb, csb and cdb.
Hi,
How to characterize effective capacitances of Mosfet and FinFet?
I want to create testbenches to be able to characterize the effective capacitance of MOSFET first and then the FinFET,
for example cgs, cgd, cgb, cdb and csb.
Could you please help me with that?
I have a specific transistor which is 5 fingers and I made it 7 for the dummy and the dummy is shared in drain with the transistor and the drain of the transistor is connected to something "live" so I am stuck at this point.
Is there another way to make the dummy in this case?
Hi
In dummies connection can I connect the gate with source to ground without the drain.
because I have the drain of this dummy connected to another transistor which is not connected to ground
Thanks
What is the effect of duty cycle on the stability of Buck converter?
What is the effect of duty cycle of the square wave output from the comparator on the stability of Buck converter?
Low Power is my first
The process is UMC 0.13 and I am using minimum sizing for all transistors (3.3 transistors, W/L=160n/340n)
I am still a beginner in design so I really appreciate your help
I got it from Bazes paper , Thank you for the document but still I don't know how to determine the sizing of the transistors
I tried to design one it operates only when the input voltage is high
Hi,
I am trying to design very low power self biased comparator like the one in the attached picture and I am loading the output with two inverters
I need to know what is the design procedures I have to follow also any materials would help a lot
Thank you.
Thank you, But when the compensator has 3 poles it is called type 3 compensator and I have read that type n system means system have n poles at the origin and type 3 compensator has only one pole at the origin.
P.S : I am using voltage controlled.
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