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Recent content by jpm

  1. J

    Current peak at minimum transistor length

    Sorry for this confusion. This is being tested atm as a digital device. Henceforth I mean both Vgs and Vds are 250mV.
  2. J

    Current peak at minimum transistor length

    Hello! I am current running some simulations on Hpsice and Virtuoso. The simulation consists of nothing more than an on nmos transistor from a 65nm library. The transistor is powered in the threshold regime at 250mV. I am sweeping the length and width and measuring the current through the...

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