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Recent content by jodenma

  1. J

    Pls help me, req:Eenlish ver AIS31 test suit for TRNG evalua

    can anyone help me to compile this software, now i have source code, but is german
  2. J

    Pls help me, req:Eenlish ver AIS31 test suit for TRNG evalua

    i need a AIS31 test suit(TRNG evaluator),but now i get a german software. who can help me give me a English software for AIS31 test suit. ths! the german software path: h**p://aida79.aida.uni-hannover.de/~peter/bsi/zertifiz/zert/interpr/?S=A
  3. J

    What's the difference between .probe and .print?

    if you use .options probe then you must add .probe *** in your sim file;the .options probe means only probe the special node in output file ,if don't special node then hspice will not probe any wave.
  4. J

    REQ：Eenlish ver AIS31 test suit for TRNG evaluati

    i need a AIS31 test suit(TRNG evaluator),but now i get a german software. who can help me give me a English software for AIS31 test suit. ths! the german software path: h**p://aida79.aida.uni-hannover.de/~peter/bsi/zertifiz/zert/interpr/?S=A
  5. J

    How to plot parameters in HSPICE

    you can use command: .options lise nose post acct opts then in the *.lis file ,you can find all your wanted.
  6. J

    question about the charge pump gain in PLL

    in the book "PLL Performance, Simulation, and Design" ,author always say the charge pump gain KΦ is xxmA,eg,1mA. in another book ,the KΦ is UB/4π for the PFD, pls tell me KΦ=1mA what's means?
  7. J

    Current reference with Nwell resistor and poly resistor

    you know the simu results good cann't see the tape out test results is good . pls take care of the error in layout and technology.
  8. J

    Help me with calibre LVS: getting negative value

    calibre LVS for help now i use calibre do LVS, because my circiut have some mos transistor which is L larger than W,so the LVS output file get the value is negative. eg: in circuit NMOS w=1.5u L=20u in calibre layout.spi NMOS W=1.5u L=-21u pls help me ,
  9. J

    how generate different voltage reference?

    change your BG structure and change the res value you can get different reference voltage.
  10. J

    need real SPICE parameters for Shottky diode

    now which FAB can do this device "Shottky diode (Al - N type Silicon) "?
  11. J

    How does this circuit work?

    like adelay circuit
  12. J

    how can design the ptat ?

    maybe yous circuit model changed with temperature, if you want get good current ,maybe VBG add BIAS is best
  13. J

    csa ring oscillator design for help

    ye, i also think its a problom for design ,but now i must design this VCO ,and the output divider must set 1 at 500kHz input,so maybe i must change my structure of vco . by the ways, for ring oscillator i dont know the functional inout voltage(vctrl) with output frequency, please help me,thanks!
  14. J

    csa ring oscillator design for help

    csa ring now i need design one CMOS CSA ring oscillator,using 0.25um technology,VDD=2.5V, Vctr increase lined from 0.5v to 2v ,the output signal frequency should be 500Khz to 80Mhz,i should how to design this circuit. now i design one initial circuit but when Vctrl from 0.5v to 2v the output...
  15. J

    How to Simulation the phase noise and jitter

    i also want to know ,now i need to design one low frequency and low noise PLL. Maybe use last new hspice can simulate phase noise in frequency field.
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