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I would choose the left one because of the speed. It will be quicker in this case (one side gate contact). Poly has higher resistance so RC would be worse with wider transistor.
And question distance: it depends on choosen technology. There might be a Nwell proximity effect. And it also depends...
You have to always import netlist into Encounter. It doesn't work without it. So place them in Cadence, power up the Encounter, import corresponding netlist and import already placed layout(like def file). Make cells fixed and you can try route it.
I've never tried that but don't see a thing why...
Encounter can see metal layers and blockages. So if you have any spare space without routing blockages inside of these instances Encounter can place wires there.
Re: Doubt Regarding IR Drop Analysis
Well you can't say this as a rule. It will help if you want switch-off some part of logic you don't need. So you'll save energy/current thus the totall current will be smaller and therefore IR will be lower.
There can be slight chance to have higher parasitic cap due to interdigitating but it can be minimal with a little care.
This is a general problem not a specific to common centroid placement.
Fillers are standart cells with Nwell/Pwell contacts inside. And dummy structures (metall filling) are just squares of metals.
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What the ... Sorry for the double post.
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