Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi liuy1987,
I met the similar problem. In my case, after extraction, the netlist gives always finger=1, and width=(total width in schematic).
I wonder if you find explainations and solutions to get around for this?
Thanks.
jimiblues
Hi martine1212,.
I agree with your lists, but have difficul in understanding 'for ft, more is not always better'. It will be very nice if you can explain more on this.
Cheers,
jimiblues
Hi all,
have any one ever simulating a mim capacitor in momentum?
I understand that the mim capacitor uses some extract layers and different substrate thickness. so the substrate definition in momentum will be different in momentum for mim capacitors. Then I have problem in simulating a mim...
In cadence spectre plot, the Gmsg and Gmax is the maximum stable gain and maximum available gain. And they could be plotted easily. But the Gumx in spectre is actually the unilateral transducer gain. It is different from U. See the attachment.
If you want to plot Mason's U, you'd better plot...
Dear all,
I am currently designing a LNA working at high frequencies. and I have some problem on understanding the Mason's gain and the maximum stable gain
I know that Mason's gain is the maximum power gain that is defined in the condition that the transistor is first unilateralized. And the...
Hi ppboyindream, thanks for your reply.
I also think it will be totally a risk to modify the layout without measurement and refining the transistor model. But my supervisor insisted that it will be no problem...
At the moment, what I did is to flatten the pcell of the transistor layout and...
I am currently doing a project using tsmc 65nm technology, where I found some problem in the layout design:
1. when I used the self-generated layout for the transistor, I found different extraction results when the layout is put in different orientations, vertically or horizontally. This gives...
Re: how to find eox in a mosfet
hi, crystalballs
I have a question on checkin the Cgs. what I see from the operating point results of the cgs or cgd are some negative values, as shown in the figure attached. i have difficulty in understanding this. How should I know the value of these...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.